My Recommendation is :
1. As someone's already suggested, go through various books on Digital HW design which have Verilog/VHDL examples provided at the end. These examples which help you understand the architecture concepts, implementation of modular design etc.
2. Download the OpenCores code that you wish to use/understand and open it in a EDA tool such as ModelSim(freely available to students) or Verdi. These tools will help you trace the signals as they traverse through various hierarchies. Try to create a block diagram for the design you downloaded and indicate the important signals at each stage.
3. Most designs use one of the commonly used bus protocols such as AXI, APB or OCP. Make sure that you go through these protocols.
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