Verilog Projects

Here are few Verilog Projects which can be used as educational projects.

If you are looking for some tutorial to start a academic project, go to  "How to start a academic project"

One can try coding for below topics.

Welcome Code ->  Display "Welcome" using Verilog.

One can make design architecture specification and start verilog coding for the same. If you have interest in verification, You can have interface timing with dummy DUT and can start building up verification environment.

1. Verilog Code for 8-bit ALU
2. Light-PCIe  ( one can make LTSSM for PCIe Gen1/2)  
3. Ethernet Mac 
4. AHB Controller 
5. APB Controller 
6. AXI bridge  - AHB -to AXI 
7. AXI Controller 
8. AXI interconnect 
9. Memory Controller 
10. FIR Filter
11. Asynchronous FIFO with 32-bit depth
12. SPI
13. I2C master/slave
14. UART Tx/Rx 
15. USIM Tx/Rx
16. MicroWire 
17. SPI 4.2 
18. AES (in Encryption )
19. Image Processing ( hardware for Image scaling) 
20. Round Robin arbitration 
21. Bluetooth baseband Controller
22. GPIO 
23. Manchester UART
24. Manchester encoder/decoder
25. 8b/10b encoder/decoder
26. RS232
27. SPDIF Interface
28. Configurable Viterbi decoder
29. Floating point FFT
30. Generic FIR Filter
31. SDRAM Controller
32. DDR Controller 
33. Parallel CRC Generator
34. OCP_TO_SPI_Bridge 

Generic Logical Projects :

1. Traffic light controller using Task
2. Lift controller for 4 floor building
3. 2 lifts in one apartment , design logic to build circuit to handle 10 story apartment. 
4. Design a circuit to find the direction of rotation of a wheel, assume whatever is required to build circuit with minimum usage of hardware.

I would say, start learning the protocols and you will only be knowing it when you actually start working on it. 

Here is the link for Academic projects.

Academic Projects Activities

RTL code will be available soon, please make this link as bookmark.

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