Verilog Design Style

Verilog HDL allow users to go for design either bottom up or top down.

Bottom up - 
The traditional method of electronic design is bottom-up. Each design is performed at the gate-level using the standard gates (refer to the Digital Section for more details). With the increasing complexity of new designs this approach is nearly impossible to maintain.


Top Down -
The desired design-style of all designers is the top-down one. A real top-down design allows early testing, easy change of different technologies, a structured system design and offers many other advantages.

With increasing complexity in the design and increasing gate count , it is impossible to keep one pure approach through out the development of a design , people are following a mix of both approach.

From my experience , First I used Top down approach and defined all the interface at top level and  then define the sub block in the design. Once architecture is finalize at broad level then one can start exploring the individual blocks and those blocks can be designed with Bottom up approach.

It is a common approach to build the logic, you need to prepare micro-architecture and architecture document before coding. Coding you can do either with verilog or with VHDL.