What is the difference between a DRC and a DRV in VLSI PD?

 DRV(Design Rule Violations) and DRC(Design rule check) are the terms used judge the quality of chip in different stages in VLSI Physical Design.

DRC:

It is actually used for making sure layout of a design must be in accordance with a set of predefined technology rules given by the foundry for manufacturability.

Stage checked at: Every stage after placement. Mainly the number should be low post route stage.

The main DRCs include shorts, opens, spacing between metals, n and p wells, same and different nets, min length, area and enclosure etc.

DRV:

The DRV holds a higher priority to DRC at any given stage of VLSI PD flow.

DRV is basically the set of factors based on which the design is characterized. All the standard cell/ macro/ any physical only cell library characterization/ selection is done with DRV kept in mind.

Main DRV are max_transition, max_capacitance, max_fanout. These generally characterize the input speed/slew, output load, driving capacity, routing, congestion and many other factors which affect the quality of the design.

Stages checked: Every stage and have to be solved if exceeding the specified target.

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