Verilog Overview

• Introduction
  
• Design Style
  
• Language description
  
  • Module
    
  • Lexical conventions
    
  • Data types
    
  • Operators
    
• Modeling Style
  
  • Gate Level Modeling
    
  • Data Flow modeling
    
  • Behavioral Modeling
    
• Other things in Verilog
  
• Simulation and testbench

• Refreshing your brain with Verilog