Verilog Code for Real Time Counter

 

Here's a Verilog code for a Real-Time Counter, which acts like a simple digital stopwatch or timer. It increments every second using a clock divider.

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✅ Features:

• Real-time seconds counter

• Uses a clock divider to convert a high-frequency clock (like 50MHz) to 1Hz

• Counts seconds in a 00 to 59 format

• Rolls over after 60 seconds (can be expanded to minutes/hours)

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🔧 Verilog Code

module real_time_counter (
    input wire clk,        // system clock (e.g., 50 MHz)
    input wire rst,        // reset (active high)
    output reg [5:0] sec   // 6-bit output for seconds (0-59)
);

    // Clock divider parameters
    parameter CLK_FREQ = 50000000;  // 50 MHz
    parameter ONE_SEC_COUNT = CLK_FREQ - 1; // Count to 1 second

    reg [25:0] clk_div_counter = 0;
    reg one_sec_pulse = 0;

    // Clock divider to generate 1 Hz pulse
    always @(posedge clk or posedge rst) begin
        if (rst) begin
            clk_div_counter <= 0;
            one_sec_pulse <= 0;
        end else if (clk_div_counter == ONE_SEC_COUNT) begin
            clk_div_counter <= 0;
            one_sec_pulse <= 1;
        end else begin
            clk_div_counter <= clk_div_counter + 1;
            one_sec_pulse <= 0;
        end
    end

    // Seconds counter
    always @(posedge clk or posedge rst) begin
        if (rst) begin
            sec <= 0;
        end else if (one_sec_pulse) begin
            if (sec == 59)
                sec <= 0;
            else
                sec <= sec + 1;
        end
    end

endmodule