QUIZ - On UPF - 3

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UPF Quiz: Power States

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1. What does a power state describe in UPF?
Clock edge timing
Logic signal width
Power supply condition of a domain

2. Which UPF element is used to define multiple states for a power domain?
create_switch
create_power_state
set_domain

3. What value in a power state defines the voltage level?
operating_point
voltage_mode
state_type

4. Which command links power states with power supplies?
connect_supply_net
add_power_state_supply_condition
bind_state

5. What is the usual name of the fully powered state?
SLEEP
ON
IDLE

6. What is the purpose of the "OFF" power state?
Reduce logic delays
Save area
Power down the domain completely

7. How are valid transitions between power states described?
Power state netlist
Power state table (PST)
Domain map

8. Which UPF construct defines the logic level a domain should retain in OFF state?
set_retention
set_state_hold
define_sleep_mode